Die-Level Semiconductor Programming
May 2022
Field Programmable Gate Arrays (FPGA), EPROM, EEPROM, FLASH:
Texas Microelectronics Corporation has the ability to program FPGA’s and most memory devices at the die level, before insertion into a package.
This process provides the distinct advantage of reducing the total packaged pin count to power and I/O lines only. The die’s programming pins need not be connected to the package itself unless your design specifically requires them. FPGA and memory die can be placed in various package pin counts dependent upon die size and your I/O count requirements.
These designs may be packaged in a monolithic configuration or incorporated with other die as part of a true microelectronic hybrid circuit. For high density and mixed signal components, die level programming, with additional support circuitry can be utilized to provide a solution without redesigning your entire product.
Texas Microelectronics has been utilizing this technology for 2 decades, however recently we are seeing a significant increase in design requests for die programming and ASICs due to the worldwide supply chain shortages of traditional Commercial off the Shelf (COTS) semiconductors.
A programmed FPGA, or a dedicated ASIC can emulate other semiconductors therefore filling the supply chain gap, which enables our clients to continue to produce their products without interruption.